Static Timing Analysis Courses & Coupons

Catalog controls

Eddin VLSI labs

1 course

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

110

students

9.5 hours

content

Oct 2026

updated

$14.99

Neil Jiang

1 course

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

(4.02 with 768 reviews)

8.8K

VLSI Mentor

1 course

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

(4.43 with 423 reviews)

Kunal Ghosh

1 course

VSD - Library characterization and modelling - Part 1

(4.31 with 407 reviews)

Kunal Ghosh

1 course

VSD - Static Timing Analysis - I

(4.38 with 3.0K reviews)

8.8K

students

3.5 hours

Sujithkumar MA

1 course

Static Timing Analysis: VLSI

(4.40 with 118 reviews)

2.5K

students

2.4 hours

Ananth Noorithaya

1 course

Foundations of Static Timing Analysis - Part 1

(4.34 with 37 reviews)

955

students

30 minutes

content

Vikas Sachdeva

1 course

Comprehensive Timing Constraints (SDC)

(2.00 with 1 reviews)

students

3.3 hours

Kunal Ghosh

1 course

VSD - Static Timing Analysis - II

(4.14 with 800 reviews)

5.5K

students

4.0 hours

content

Digital Courses

1 course

The Complete Course of Static Timing Analysis STA

(3.84 with 22 reviews)

103

students

Puneet Mittal

1 course

Fundamental of Static Timing Analysis (Part 1)

(4.10 with 132 reviews)

1.0K

students

Life Skills

1 course

Mastering Digital VLSI, ASIC and Verilog Interview Questions

(4.49 with 415 reviews)

Catalog controls

Eddin VLSI labs

1 course

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

110

students

9.5 hours

content

Oct 2026

updated

$14.99

Neil Jiang

1 course

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

(4.02 with 768 reviews)

8.8K

VLSI Mentor

1 course

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

(4.43 with 423 reviews)

Kunal Ghosh

1 course

VSD - Library characterization and modelling - Part 1

(4.31 with 407 reviews)

Kunal Ghosh

1 course

VSD - Static Timing Analysis - I

(4.38 with 3.0K reviews)

8.8K

students

3.5 hours

Sujithkumar MA

1 course

Static Timing Analysis: VLSI

(4.40 with 118 reviews)

2.5K

students

2.4 hours

Ananth Noorithaya

1 course

Foundations of Static Timing Analysis - Part 1

(4.34 with 37 reviews)

955

students

30 minutes

content

Vikas Sachdeva

1 course

Comprehensive Timing Constraints (SDC)

(2.00 with 1 reviews)

students

3.3 hours

Kunal Ghosh

1 course

VSD - Static Timing Analysis - II

(4.14 with 800 reviews)

5.5K

students

4.0 hours

content

Digital Courses

1 course

The Complete Course of Static Timing Analysis STA

(3.84 with 22 reviews)

103

students

Puneet Mittal

1 course

Fundamental of Static Timing Analysis (Part 1)

(4.10 with 132 reviews)

1.0K

students

Life Skills

1 course

Mastering Digital VLSI, ASIC and Verilog Interview Questions

(4.49 with 415 reviews)

Continue exploring

Static Timing Analysis

Static Timing Analysis

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Library characterization and modelling - Part 1

VSD - Static Timing Analysis - I

Static Timing Analysis: VLSI

Foundations of Static Timing Analysis - Part 1

Comprehensive Timing Constraints (SDC)

VSD - Static Timing Analysis - II

The Complete Course of Static Timing Analysis STA

Fundamental of Static Timing Analysis (Part 1)

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Price & availability

Course Type

Last Course Update

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Library characterization and modelling - Part 1

VSD - Static Timing Analysis - I

Static Timing Analysis: VLSI

Foundations of Static Timing Analysis - Part 1

Comprehensive Timing Constraints (SDC)

VSD - Static Timing Analysis - II

The Complete Course of Static Timing Analysis STA

Fundamental of Static Timing Analysis (Part 1)

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Price & availability

Course Type

Last Course Update

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Library characterization and modelling - Part 1

VSD - Static Timing Analysis - I

Static Timing Analysis: VLSI

Foundations of Static Timing Analysis - Part 1

Comprehensive Timing Constraints (SDC)

VSD - Static Timing Analysis - II

The Complete Course of Static Timing Analysis STA

Fundamental of Static Timing Analysis (Part 1)

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Advanced Verilog HDL — Sequential Logic, Counters & FSMs

ASIC Bootcamp for VLSI Engineer: STA Basic Concepts

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Library characterization and modelling - Part 1

VSD - Static Timing Analysis - I

Static Timing Analysis: VLSI

Foundations of Static Timing Analysis - Part 1

Comprehensive Timing Constraints (SDC)

VSD - Static Timing Analysis - II

The Complete Course of Static Timing Analysis STA

Fundamental of Static Timing Analysis (Part 1)

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Topics related to Static Timing Analysis

Topics related to Static Timing Analysis