ASIC Design Courses & Coupons

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VLSI Mentor

1 course

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

(4.43 with 423 reviews)

5.9K

students

41 hours

content

Jul 2025

updated

$17.99

Kunal Ghosh

1 course

VSD - Physical Design Flow

(4.37 with 3.5K reviews)

12.7K

students

Robin Garg

1 course

UPF Power Aware Design & Verification

(4.39 with 1.5K reviews)

6.8K

students

6.3 hours

Rohini Vikas Daund

1 course

Implementation of ASIC Design Flow using Modelsim

(4.22 with 69 reviews)

2.0K

students

Scott Dickson

1 course

Introduction to VHDL for FPGA and ASIC design

(4.63 with 1.6K reviews)

8.3K

Bulat Ushakov

1 course

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

(4.56 with 9 reviews)

VLSI Mentor

1 course

ASIC Design & Verification using Verilog HDL +Project Demo

(4.47 with 146 reviews)

3.4K

Life Skills

1 course

Mastering Digital VLSI, ASIC and Verilog Interview Questions

(4.49 with 415 reviews)

Electronics Zone

1 course

Verilog HDL Mastery: From Syntax to Complex Systems

(4.56 with 9 reviews)

Catalog controls

VLSI Mentor

1 course

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

(4.43 with 423 reviews)

5.9K

students

41 hours

content

Jul 2025

updated

$17.99

Kunal Ghosh

1 course

VSD - Physical Design Flow

(4.37 with 3.5K reviews)

12.7K

students

Robin Garg

1 course

UPF Power Aware Design & Verification

(4.39 with 1.5K reviews)

6.8K

students

6.3 hours

Rohini Vikas Daund

1 course

Implementation of ASIC Design Flow using Modelsim

(4.22 with 69 reviews)

2.0K

students

Scott Dickson

1 course

Introduction to VHDL for FPGA and ASIC design

(4.63 with 1.6K reviews)

8.3K

Bulat Ushakov

1 course

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

(4.56 with 9 reviews)

VLSI Mentor

1 course

ASIC Design & Verification using Verilog HDL +Project Demo

(4.47 with 146 reviews)

3.4K

Life Skills

1 course

Mastering Digital VLSI, ASIC and Verilog Interview Questions

(4.49 with 415 reviews)

Electronics Zone

1 course

Verilog HDL Mastery: From Syntax to Complex Systems

(4.56 with 9 reviews)

Continue exploring

ASIC Design

ASIC Design

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Physical Design Flow

UPF Power Aware Design & Verification

Implementation of ASIC Design Flow using Modelsim

Introduction to VHDL for FPGA and ASIC design

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

ASIC Design & Verification using Verilog HDL +Project Demo

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Verilog HDL Mastery: From Syntax to Complex Systems

Price & availability

Course Type

Last Course Update

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Physical Design Flow

UPF Power Aware Design & Verification

Implementation of ASIC Design Flow using Modelsim

Introduction to VHDL for FPGA and ASIC design

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

ASIC Design & Verification using Verilog HDL +Project Demo

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Verilog HDL Mastery: From Syntax to Complex Systems

Price & availability

Course Type

Last Course Update

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Physical Design Flow

UPF Power Aware Design & Verification

Implementation of ASIC Design Flow using Modelsim

Introduction to VHDL for FPGA and ASIC design

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

ASIC Design & Verification using Verilog HDL +Project Demo

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Verilog HDL Mastery: From Syntax to Complex Systems

ASIC Synthesis-STA-Physical Design(PD):Cadence+Synopsys flow

VSD - Physical Design Flow

UPF Power Aware Design & Verification

Implementation of ASIC Design Flow using Modelsim

Introduction to VHDL for FPGA and ASIC design

Майнинг Биткоина на ASIC-майнерах. Практическое руководство.

ASIC Design & Verification using Verilog HDL +Project Demo

Mastering Digital VLSI, ASIC and Verilog Interview Questions

Verilog HDL Mastery: From Syntax to Complex Systems

Topics related to ASIC Design

Topics related to ASIC Design