ASIC Design & Verification using Verilog HDL +Project Demo

Coupon history

Comidoc has tracked 1 coupon for this course since 2025, last checked 1 year, 1 month, 5 days ago.

More Verilog HDL courses

Verilog HDL: VLSI Hardware Design Comprehensive MasterclassShepherd Tutorials4.3 (4,818)12h 41m

Vivado Basics: Learn FPGA Design with a PCIe ProjectOfer Keren3.8 (165)8h

Verilog for an FPGA Engineer with Xilinx Vivado Design SuiteKumar Khandagle4.5 (2,051)16h 37m

Verilog HDL Fundamentals for Digital Design and VerificationOvidiu Plugariu4.5 (1,687)5h 23m

Verilog HDL Through ExamplesSujithkumar MA4.4 (146)5h 34m

Verilog para FPGAsArturo Sacramento Lopez Gonzalez4.3 (36)5h 37m

System Design using VerilogDr. Yogesh Misra4.5 (771)30h 25m

FPGA Embedded Design, Part 1 - VerilogEduardo Corpeño4.5 (1,140)3h 43m

More Related Topics

• ASIC Design11
• Digital Logic & Hardware82
• APB Protocol4
• FPGA Design89
• RTL Design17
• Digital Circuit Design94
• VLSI Design56
• Hardware Verification46
• AXI4 Bus Protocol9
• Xilinx Vivado27