
ASIC Flow, Verilog Language, Digital Fundamentals, Combinational circuits, Sequential circuits, APB Protocol
ASIC Design & Verification using Verilog HDL +Project Demo
InstructorVLSI MentorDuration15h 58m
Students3,384
Rating4.5 (146)

ASIC Flow, Verilog Language, Digital Fundamentals, Combinational circuits, Sequential circuits, APB Protocol
InstructorVLSI MentorComidoc has tracked 1 coupon for this course since 2025, last checked 10 months, 14 days ago.
| Coupon code | Discount | Added | Status | Lifetime |
|---|---|---|---|---|
| DIG_VERI_OCT25_FREE | 100% off | Expired | ~5 daysRan full term |







