Scott Dickson

FPGA / ASIC Design Engineer
4.71 (1562 reviews)
4
active courses
0
removed courses
Jul 2020
first content date
Jan 2025
last content date
Scott Dickson
9707
total students
1562
total reviews
4.71
average rating
24
total content length
Courses
Introduction to VHDL for FPGA and ASIC design

Introduction to VHDL for FPGA and ASIC design

6.8K
students
9.5 hours
content
Aug 2024
updated
$29.99
AXI4 Implementations in FPGA Designs

AXI4 Implementations in FPGA Designs

827
students
8 hours
content
Jan 2025
updated
$74.99
Xilinx Vivado Essentials for the Logic Designer

Xilinx Vivado Essentials for the Logic Designer

891
students
2.5 hours
content
Jun 2021
updated
$44.99
Advanced VHDL for Verification

Advanced VHDL for Verification

1.2K
students
4.5 hours
content
Jul 2020
updated
$29.99

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