VSD - Static Timing Analysis - II

VLSI - Analyse your chip timing for free
4.13 (754 reviews)
Udemy
platform
English
language
Design Tools
category
Kunal Ghosh
instructor
VSD - Static Timing Analysis - II
5 288
students
4 hours
content
Oct 2018
last update
$49.99
regular price

What you will learn

Students will be able to do a real full chip static timing analysis with $0 spent, as designs and tools used in this course are opensource

Students will be able to appreciate power of opensource EDA tools, like Opentimer used in this course, and help in contributing towards the development

Students can explore commercial tools with knowledge and concepts from this course, quite easily

Manage a entire chip timing signoff

Course Gallery

VSD - Static Timing Analysis - II – Screenshot 1
Screenshot 1 – VSD - Static Timing Analysis - II
VSD - Static Timing Analysis - II – Screenshot 2
Screenshot 2 – VSD - Static Timing Analysis - II
VSD - Static Timing Analysis - II – Screenshot 3
Screenshot 3 – VSD - Static Timing Analysis - II
VSD - Static Timing Analysis - II – Screenshot 4
Screenshot 4 – VSD - Static Timing Analysis - II

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Related Topics

1026104
udemy ID
29/11/2016
course created date
23/11/2019
course indexed date
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