Building SDRAM Controller in Verilog from Scratch
Using Vivado 2024
4.50 (6 reviews)
74
students
5 hours
content
Apr 2025
last update
$19.99
regular price
What you will learn
Architecture of 3rd Gen SDRAM memories
Building Initialization, Write, Read modules from scratch
Building Self refresh & Auto refresh modules
Mode Register usage & Understanding Write and Read transactions of SDRAM
Use Micron SDRAM model to test codes
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6476135
udemy ID
20/02/2025
course created date
14/04/2025
course indexed date
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