
Full Digital IC Design Flow: Verilog, Synthesis, DFT, CDC, Low‑Power, & PnR with Cadence & Synopsys USE PROMO BUY-13
Complete ASIC Design Flow: VLSI From Idea to Silicon
InstructorElectronics ZoneDuration44h 58m
Students216
Rating4.8 (20)

Full Digital IC Design Flow: Verilog, Synthesis, DFT, CDC, Low‑Power, & PnR with Cadence & Synopsys USE PROMO BUY-13
InstructorElectronics Zone
Free




