VSD - Mixed-signal RISC-V based SoC on FPGA

FPGA flow for Mixed Signal SoC with RISC-V based core and PLL IP

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Why take this course?

🎓 Course Title: VSD - Mixed-Signal RISC-V based SoC on FPGAs

🎉 Course Headline: Master FPGA Flow for Mixed-Signal SoC with RISC-V Based Core and PLL IP!

Course Description:

Are you ready to dive deep into the world of mixed-signal FPGAs and explore the intricacies of designing a System on Chip (SoC) with a RISC-V based core and PLL IP? This comprehensive webinar is your gateway to understanding the essentials of FPGA design flow, tailored for both novices and experienced professionals in ASIC/Physical Design.

🔍 What You'll Learn:

FPGA Fundamentals: Get acquainted with the basics of mixed-signal FPGAs and how they differ from traditional digital circuits.
RISC-V Integration: Learn how to integrate a RISC-V based core into your SoC design, understanding the nuances of pipelining and transaction-level Verilog.
Mixed-Signal Design: Explore the design process for mixed-signal circuits, including the integration of PLL IP within an FPGA context.
FPGA vs ASIC: Gain insights into the similarities and differences between FPGA and ASIC design flows, helping you understand which is more suitable for your projects.
Cross-Discipline Connectivity: This course bridges the gap between VLSI students, analog designers, FPGA designers, and ASIC designers, providing a unified approach to design verification and implementation.

🔥 Why Join?

Hands-On Experience: Extend your knowledge from the MYTH workshop by converting a RISC-V pipelined CPU coded in transaction-level Verilog into actual Verilog code for an FPGA SoC.
Professional Enhancement: If you have a background in ASIC/Physical Design, this webinar will enrich your skill set and provide you with a deeper understanding of FPGAs.
Community Learning: This course is designed to integrate into a community of learners, offering a collaborative environment for design verification and validation.

🛠️ Upcoming Opportunities:

Stay tuned for our follow-up series of FPGA webinars and an intensive 5-day hands-on workshop. These will be built around the OpenFPGA framework and Makerchip visualization software, enabling you to learn FPGA fundamentals with labs, even without a physical FPGA board.

🌟 Innovation at Its Best

This webinar is not just about learning; it's about pushing the boundaries of your design capabilities and embracing innovation in the realm of mixed-signal SoC design on FPGAs.

Join us on this exciting journey and transform your approach to electronic system design! 🚀

All the best and happy learning on your path to becoming an FPGA expert! 🎓✨