Designing RISC-V CPU in Verilog and its FPGA Implementation

Understanding RISC-V ISA (RV32I), Verilog implementation of custom RISC-V CPU, LED GPIO, UART and porting to FPGA
Udemy
platform
English
language
Engineering
category
instructor
Designing RISC-V CPU in Verilog and its FPGA Implementation
9
students
6 hours
content
Jun 2025
last update
$19.99
regular price

What you will learn

Able to develop and demonstrate a working RISC-V processor core on an FPGA, capable of executing basic programs and interacting with peripherals

To demonstrate proficiency in using hardware description languages (Verilog) and FPGA synthesis tools

Students will be able to integrate a RISC-V core with memory and peripherals, debug hardware and software, and analyze system performance on an FPGA

To be familiar with real-world application of RISC-V architecture using your own CPU.

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6663087
udemy ID
10/06/2025
course created date
06/07/2025
course indexed date
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