High-Level Synthesis for FPGA, Part 1-Combinational Circuits

Logic Design with Vitis-HLS
4.41 (472 reviews)
Udemy
platform
English
language
Hardware
category
Mohammad Hosseinbady
instructor
High-Level Synthesis for FPGA, Part 1-Combinational Circuits
3 418
students
8 hours
content
Jan 2022
last update
$69.99
regular price

What you will learn

Designing combinational logic circuits with C/C++ language using the HLS approach

Understanding the basic concepts of High-Level Synthesis (HLS)

Using HLS concepts for designing combinational logic circuits

HLS design flow for FPGAs

Working with Xilinx Vitis-HLS and Vivado suite Toolsets

How to generate RTL hardware IPs using Vitis-HLS

Writing C-testbench in HLS

Implementing two exciting projects with HLS

Screenshots

High-Level Synthesis for FPGA, Part 1-Combinational Circuits - Screenshot_01High-Level Synthesis for FPGA, Part 1-Combinational Circuits - Screenshot_02High-Level Synthesis for FPGA, Part 1-Combinational Circuits - Screenshot_03High-Level Synthesis for FPGA, Part 1-Combinational Circuits - Screenshot_04
Related Topics
3451458
udemy ID
26/08/2020
course created date
07/10/2020
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